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| SSM04N70BGP-A N-channel Enhancement-mode Power MOSFET PRODUCT SUMMARY BVDSS R DS(ON) ID DESCRIPTION The SSM04N70BGP-A achieves fast switching performance with low gate charge without a complex drive circuit. It is suitable for high voltage applications such as AC/DC converters, SMPS and general off-line switching circuits. 650V 2.4 4A Pb-free; RoHS-compliant TO-220 The SSM04N70BGP-A is in TO-220 for through-hole mounting where a small footprint is required on the board, and/or an external heatsink is to be attached. G D S These devices are manufactured with an advanced process, providing improved on-resistance and switching performance. TO-220 (suffix P) ABSOLUTE MAXIMUM RATINGS Symbol VDS VGS ID IDM PD EAS IAR EAR Parameter Drain-source voltage Gate-source voltage Continuous drain current, TC = 25C TC = 100C Pulsed drain current 1 Value 650 30 4 2.5 15 62.5 0.5 3 Units V V A A A W W/C mJ A mJ Total power dissipation, TC = 25C Linear derating factor Single pulse avalanche energy Avalanche current Repetitive avalanche energy 100 4 4 TSTG TJ Storage temperature range Operating junction temperature range -55 to 150 -55 to 150 C C THERMAL CHARACTERISTICS Symbol RJC RJA Parameter Maximum thermal resistance, junction-case Maximum thermal resistance, junction-ambient Value 2 62 Units C/W C/W Notes: 1. Pulse width must be limited to avoid exceeding the safe operating area. 2. Pulse width <300us, duty cycle <2%. 3. Starting Tj = 25C, VDD=50V , L=25mH , RG=25 , IAS= 4A. 9/29/2006 Rev.3.1 www.SiliconStandard.com 1 of 7 SSM04N70BGP-A ELECTRICAL CHARACTERISTICS Symbol BVDSS Parameter Drain-source breakdown voltage Breakdown voltage temperature coefficient (at Tj = 25C, unless otherwise specified) Test Conditions VGS=0V, ID= 1mA Reference to 25C, ID=1mA VGS=10V, ID=2A Min. 650 Typ. 0.6 Max. Units 2.4 V V/C BV DSS/Tj RDS(ON) Static drain-source on-resistance VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate threshold voltage Forward transconductance VDS=VGS, ID=250uA VDS=20V, ID=1A 2 - 2.5 16.7 4.1 4.9 11 8.3 23.8 8.2 950 65 6 4 10 100 100 - V S uA uA nA nC nC nC ns ns ns ns pF pF pF Drain-source leakage current VDS=600V, VGS=0V VDS=480V ,VGS=0V, Tj = 150C VGS=30V ID=4A VDS=480V VGS=10V VDS=300V ID=4A RG=10 , VGS=10V RD=75 VGS=0V VDS=25V f=1.0MHz Gate-source leakage current Total gate charge 2 Gate-source charge Gate-drain ("Miller") charge Turn-on delay time Rise time Turn-off delay time Fall time Input capacitance Output capacitance Reverse transfer capacitance 2 Source-Drain Diode Symbol VSD IS I SM Parameter Forward voltage 2 Test Conditions IS= 4A, VGS=0V Min. - Typ. - Max. Units 1.5 V Continuous source current (body diode) VD=VG=0V , VS=1.3V - - 4 15 A A Pulsed source current (body diode)1 Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150C. 2.Pulse width <300us, duty cycle <2%. 9/29/2006 Rev.3.1 www.SiliconStandard.com 2 of 7 SSM04N70BGP-A 2.5 2 T C =25 C 2 o V G =10V V G =6.0V V G =5.0V 1.5 T C =150 o C V G =10V V G =6.0V V G =5.0V V G =4.5V ID , Drain Current (A) 1.5 V G =4.5V 1 ID , Drain Current (A) 1 V G =4.0V 0.5 0.5 V G =4.0V V G =3.5V 0 0 1 2 3 4 5 6 7 0 0 2 4 6 8 10 12 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1.2 2.5 I D =2A V G =10V 1.1 2 Normalized BVDSS (V) Normalized RDS(ON) 1.5 1 1 0.9 0.5 0.8 -50 0 50 100 150 0 -50 0 50 100 150 T j , Junction Temperature ( o C) T j , Junction Temperature ( o C ) Fig 3. Normalized BVDSS vs. Junction Temperature Fig 4. Normalized On-Resistance vs. Junction Temperature 9/29/2006 Rev.3.1 www.SiliconStandard.com 3 of 7 SSM04N70BGP-A 4.5 40 4 3.5 ID , Drain Current (A) 3 PD (W) 25 50 75 100 125 150 2.5 20 2 1.5 1 0.5 0 0 0 50 100 150 T c , Case Temperature ( o C ) T c , Case Temperature ( C ) o Fig 5. Maximum Drain Current vs. Case Temperature Fig 6. Typical Power Dissipation 100 1 10 Normalized Thermal Response (Rthjc) DUTY=0.5 0.2 ID (A) 10us 100us 1 0.1 0.1 0.05 1ms 10ms 0.1 PDM 0.02 0.01 SINGLE PULSE t T Duty factor = t/T Peak Tj = P DM x Rthjc + TC 100ms T c =25 o C Single Pulse 0.01 1 10 100 1000 10000 0.01 0.00001 0.0001 0.001 0.01 0.1 1 10 V DS (V) t , Pulse Width (s) Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance 9/29/2006 Rev.3.1 www.SiliconStandard.com 4 of 7 SSM04N70BGP-A 16 10000 f=1.0MHz I D =4A 14 VGS , Gate to Source Voltage (V) 12 V DS =320V V DS =400V Ciss 10 V DS =480V C (pF) 100 8 Coss 6 4 Crss 2 0 0 5 10 15 20 25 1 1 6 11 16 21 26 31 Q G , Total Gate Charge (nC) V DS (V) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 100 5 4 10 VGS(th) (V) 1.6 IS (A) T j =150 o C T j = 25 o C 3 2 1 1 0.1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0 -50 0 50 100 150 V SD (V) T j , Junction Temperature ( o C ) Fig 11. Forward Characteristic of Reverse Diode Fig 12. Gate Threshold Voltage vs. Junction Temperature 9/29/2006 Rev.3.1 www.SiliconStandard.com 5 of 7 SSM04N70BGP-A VDS RD 90% D VDS TO THE OSCILLOSCOPE 0.5x RATED VDS RG G 10% + 10 V S VGS VGS td(on) tr td(off) tf Fig 13. Switching Time Circuit Fig 14. Switching Time Waveform VG VDS TO THE OSCILLOSCOPE QG 10V D G S + 0.8 x RATED VDS QGS QGD VGS 1~ 3 mA IG ID Charge Q Fig 15. Gate Charge Circuit Fig 16. Gate Charge Waveform 9/29/2006 Rev.3.1 www.SiliconStandard.com 6 of 7 SSM04N70BGP-A PHYSICAL DIMENSIONS - TO-220 E L2 A SYMBOLS Millimeters MIN NOM MAX L1 A 4.25 0.65 1.15 0.40 1.00 9.70 ---12.70 2.60 1.00 2.6 14.70 6.30 3.50 8.40 4.48 0.80 1.38 0.50 1.20 10.00 2.54 13.60 2.80 1.40 3.10 15.50 6.50 3.60 8.90 4.70 0.90 1.60 0.60 1.40 10.40 ---14.50 3.00 1.80 3.6 16 6.70 3.70 9.40 L5 c1 b b1 c c1 E D L4 e L L1 L2 L3 L4 L5 L3 b1 L D 1. All dimensions are in millimeters. 2. Dimensions do not include mold protrusions. b c e PART MARKING - TO-220 PACKING: Moisture sensitivity level MSL3 1000pcs in tubes packed inside a moisture barrier bag (MBB). 04N70BP-A YWWSSS PART NUMBER: 04N70BGP-A = SSM04N70BGP-A DATE/LOT CODE: Y = last digit of the year WW = work week (01 -> 52) SSS = lot code sequence Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 9/29/2006 Rev.3.1 www.SiliconStandard.com 7 of 7 |
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